Gate-level IR/EM CAD/NLP Engineer

responsibilities will include: Developing innovative ML and large language model applications to understand, explain, and interact with EDA (electronic design automation) software. Designing and implementing their interaction with our extensive compute infrastructure. Generating customized reports and dashboards to identify IR/EM issues and recommended solutions to improve power grid integrity. Identifying opportunities to automate and streamline various IR/EM analysis and signoff flows. Support and collaborate with design groups (Physical-design and integration, Circuit-design / Power / Package & System / Technology) on their IR/EM requirements for various analysis flows. Work side by side with EDA vendors to enhance and develop solution to improve efficiency and capacity. Minimum requirement of BS + 3 years of relevant industry experience Experience in developing object-oriented programs, utilizing data structures, and writing algorithms Experience in writing machine learning algorithms, implementing natural language processing (NLP), or using large language models in industry applications Experience in EDA Tool, CAD flow or TFM (Tool Flow Methodology) Proficiency with UNIX shell environment, Python, and code revision control Knowledge in some of the PNR implementation and/or EMIR analysis flow Experience in electrical engineering machine learning applications Experience with large language models, including fine-tuning, retrieval augmented generation, and prompt engineering Ability to coordinate and drive initiatives with little to no oversight Excellent communication and presentation skills